module MS_s (
input [11:0] MS_a,
input [11:0] MS_b,
output [11:0] MS_s
);

wire [11:0] sub0;
wire [11:0] sub1;
wire c;
wire c_fault;

assign {c, sub0} = MS_a - MS_b;
assign {c_fault, sub1} = sub0 + 12'd3329;

assign MS_s = c? sub1: sub0;

endmodule